This invention relates to performing arithmetic operations in integrated circuits and more particularly to ways of implementing fixed-point functions with user-defined input and output formats.
As system computing requirements for different applications continue to increase, integrated circuits such as programmable logic devices (PLDs), which offer increased flexibility in computing, are often used over competing technologies. Programmable integrated circuits can efficiently combine number formats and offer various customization options for different types of arithmetic operations.
As an example, programmable logic devices can be configured to support, for floating-point arithmetic operations, non-standard-number formats (i.e., exponent and fraction pairs), non-standard computing stages (e.g., custom arithmetic compiler stages), non-standard exception handling, application-specific components such as a custom accumulator, and various user-selectable implementation trade-offs. As another example, programmable logic devices can also be configured to support, for fixed-point arithmetic operations, user-defined input and output number formats, custom input and output value ranges, and various user-selectable implementation tradeoffs.
A substantial amount of research has been done on implementing functions that receive normalized inputs. However, not all inputs are normalized. In response to receiving non-normalized inputs, such inputs need to be normalized prior to performing the intended computation. The additional step of normalizing a non-normalized input requires circuitry for counting leading zeros and performing left shifts. Once the desired computation has been performed on the normalized input, the corresponding result also needs to be denormalized, which requires circuitry for performing right shifts. Such type of shifting circuits and leading-zero counters are, however, very expensive, especially for fixed-point computing. Moreover, functions with asymptotic behaviors tend to behave unpredictably for inputs in the asymptotic input range.